Abstract
In this paper, an investigation into the preparation technology and performance of 1280×1024 middle-wavelength (MW) HgCdTe infrared focal plane arrays (IRFPAs) with a pixel size of 10μm was introduced. The manufacturing process of these high-resolution FPAs involved the utilization of B+ injection to establish small-sized n-on-p junctions and the application of high-precision In-bump interconnection. Through development of the process, the adverse effects of the mismatch between HgCdTe devices and readout integrated circuits (ROICs) were mitigated, thereby reducing the likelihood of device failure. The assembled FPAs were evaluated to photoelectric performance evaluation at a temperature of 85 K. The experimental results demonstrate that the detector's spectral response encompasses a wavelength range of 3.67 μm to 4.88 μm. The highest pixel operability of the assembly can reach 99.95%. The average values of the noise equivalent temperature difference (NETD) and the dark current density for all the pixels of the assembly are respectively less than 16 mK and 2.1×1
Keywords
Infrared detection technology, due to its advantages such as long detection range, day and night imaging capabilities, and atmospheric penetration, finds extensive applications in both military and civilian domains. Due to adjustable bandgap of Mercury cadmium telluride (Hg1-xCdxTe) material by carefully selecting the composition,it offers the flexibility to fabricate infrared detectors with adjustable cutoff wavelengths
The detection range of IRFPAs is directly influenced by the instantaneous field of view of the pixels. Consequently, the development of small-pitch and high-resolution FPAs within a fixed field of view becomes crucial for increasing the detection range. For instance, when it changes from a 30 μm pitch 320×256 FPA to a 15 μm pitch 640×512 FPA can enhance the MW IRFPA's detection range by approximately 50% at F=2
Many institutions are doing research and developing the high-resolution FPAs. In order to meet the needs of IR detection systems with higher spatial resolution, Sofradir has developed a Jupiter model operating in the MWIR band with a 1 280×1 024 format and a pixel size of 15 µm, and is cooled by Thales Cryogenics' linear flexure bearing split Stirling coole
After successively manufacturing 30 μm pitch 320×256 and 15 μm pitch 640×512 MW IRFPAs, Zhejiang Juexin Microelectronics Co., Ltd. has also conducted research and development on the manufacturing technology of 10 μm pitch 1 280×1 024 MW IRFPAs. The key points in the research and development process are to overcome the impact of thermal stress between HgCdTe chips and ROICs on the performance of IRFPAs, as well as to solve the problems such as large-area material uniformity, small pixel process technology, and high-density In bump bonding technique. By using CdZnTe as the substrate and removing it to release the thermal mismatch, and improving the structure of the In bump to enhance the interconnection strength, 10 μm pitch 1 280×1 024 HgCdTe MW IRFPAs with high performance has been developed successfully. This paper introduces the preparation and related properties of the medium-wave 1 280×1 024 (10 µm) HgCdTe infrared detector made by Zhejiang Juexin Microelectronics Co., Ltd.
With the continuous progress of HgCdTe IRFPAs technology, the preparation techniques for IRFPAs with small pixel sizes have reached a level of maturity, facilitating the development of high-resolution IRFPAs. Nevertheless, it is crucial to acknowledge that the advancement of new manufacturing technology is accompanied by a range of challenges attributed to the reduction in pixel size and the expansion of the FPA area.
The vertical Bridgman method was employed to grow CdZnTe crystals as substrates for the HgCdTe epitaxial layer. The CdZnTe substrates were polished, and Hg1-xCdxTe material (with x~0.3) was grown on the (111) B CdZnTe substrate using liquid phase epitaxy (LPE). The resulting HgCdTe epilayers, with a etch pit density lower than 5×1
To ensure the smoothness of the HgCdTe epitaxial layer, the surface flatness of the CdZnTe substrates was controlled within 1 μm through processes such as chemical mechanical polishing (CMP) and chemical polishing (CP). The surface profiles of the HgCdTe materials were measured using a Bruker ContourGT-X interferometer, as shown in

Fig. 1 Surface height profiles of HgCdTe epilayer used for 1280×1024 detector fabrication
图1 1280×1024探测器的碲镉汞外延材料面型图
The performance of HgCdTe infrared detectors is closely tied to the structure of the p/n junctio

Fig. 2 Structure of the pixel in 1280×1024 arrays
图2 1280×1024阵列像元结构图
The pixel size of the fabricated 1280×1024 arrays in this study is 10 μm, which allows for a smaller, lighter, and more compact system. Additionally, it contributes to reduced power consumption and cost. Moreover, reducing the pixel pitch enables more FPAs to be obtained from the same material substrate

Fig. 3 Indium bump morphology taken with ContourGT-X
图3 ContourGT-X拍摄的铟柱形貌图
HgCdTe IRFPAs consist of several components, including the HgCdTe chip, In bump interconnection area, Si readout circuit, and circuit boards. These components are fabricated at room temperature and operate at low temperatures (typically 77~120 K). However, due to the mismatch in thermal expansion coefficients among these materials, thermal stress can arise during the cooling process of FPA devices. This can lead to issues such as chip fracture and fatigue damage of solder joints, resulting in degraded FPA performance
To address these challenges, the gap between the HgCdTe chip and the readout circuit is filled with low-temperature glue. In this study, an optimized glue filling process was adopted to ensure reliable interconnection and prevent incomplete filling at the edges. To achieve uniform glue distribution, the capillary effect was utilized. Additionally, a three-stage variable temperature baking process was employed to prevent excessive stress caused by rapid glue curing. The process involved an initial bake at 45°C for 2 hours, which is below the glass transition temperature of the adhesive. Subsequently, the glue was cured by baking at a temperature above the glass transition temperature for 1 hour, followed by a final bake at 45°C for 12 hours. Furthermore, a slotting process was implemented to mitigate device failures resulting from stress. After chip metallization, the cutting process using a diamond blade can generate microscale edge chippings, leading to stress concentration and device failure during thermal shocks. Various methods such as wet etching, laser etching, or dry etching can be employed to create slots around the chip, effectively reducing edge chippings during cutting. In this study, dry etching was chosen due to the expansion of corrosion associated with wet etching and the thermal effects induced by lasers.

Fig. 4 The bad pixel mapping for 1 280 × 1 024 MWIR FPAs: (a) unslotted FPA, (b) slotted FPA
图4 1280 × 1024中波红外焦平面阵列坏元图: (a)未开槽器件, (b)开槽器件
Through a series of process improvements, 10 μm pitch 1280×1024 MW HgCdTe infrared focal plane arrays were successfully fabricated. The FPAs were then mounted and wire-bonded in a leadless chip carrier (LCC) within a dewar and coupled with a Stirling cooler, as depicted in

Fig. 5 MWIR detector with 1 280×1 024 10 μm HgCdTe FPA
图5 1 280×1 024 10 μm碲镉汞中波红外探测器
ARRAY FEATURES | |
---|---|
Format | 1280×1024 |
Pixel pitch | 10 μm |
Detector spectral response | 3.7±0.2~4.8±0.2 μm |
FPA Operating Temperature | 85 K |
ROIC (READ-OUT INTEGRATED CIRCUIT) | |
Selection | Serial electrical interface |
ROIC architecture | Snapshot operation, direct injection input circuit, ITR/IWR mode, n-on-p |
ROIC functionalities | Programmable integration time, image invert / revert / inverse |
Window modes | 1280×1024,1024×1024,1280×720 (any size down to 128×2 (8CH) or 64×2 (4CH) ) |
Charge handling capacity | ITR mode : 4.6 Me |
Electrical dynamic range | ITR mode : 2.4 V |
Readout noise | ITR mode : 0.18 mV |
Signal outputs | Analog 4 or 8 channels |
Pixel output rate | Up to 20 MHz per output |
Frame rate | Up to 100 Hz full frame rate |
The spectral response of the detector was tested using a monochromator at an operating temperature of 85 K, as shown in

Fig. 6 Response spectrum of a 1 280×1 024 MWIR detector
图6 1 280×1 024中波红外探测器光谱图
The responsivities and NETDs of the detectors were determined by measuring the output voltages of the detector using a black body as the background at temperatures of 20 ℃ and 35 ℃. The measurement employed an integration time of 20 ms.

Fig. 7 The measurement of: (a) Responsivity map, (b) Responsivity histogram of the detector
图7 探测器:(a)响应灰度图,(b)响应直方图

Fig. 8 The measurement of: (a) NETD map, (b) NETD distribution histogram of the detector
图8 探测器:(a)NETD灰度图,(b)NETD分布直方图
In addition, the dark current of the FPA was tested at an operating temperature of 85 K. The results of the dark current measurements are shown in

Fig. 9 The measurement of: (a) Dark current map, (b) Dark current distribution histogram of the FPA
图9 焦平面阵列的:(a)暗电流灰度图,(b)暗电流分布直方图
Institute | Format | Pixel pitch/μm | Spectral response/μm | Mean NETD | Array operability |
---|---|---|---|---|---|
LYNRE | 1280×720 | 10 | 3.7-4.8 | ≤20 mK | ≥99.80% |
The 11th Research Institute of CETC | 1024×1024 | 10 | 3.7-4.8 | ≤25 mK | ≥99.50% |
SemiConductor Device | 1920×1536 | 10 | 3.7-4.8 | ≤30 mK | ≥99.5% |
Zhejiang Juexin Microelectronics Co.,Ltd | 1280×1024 | 10 | 3.7-4.8 | 15.56 mK | 99.95% |
Finally, to compare the differences between the 10 µm pitch MW 1280×1024 array and the 15 µm pitch 640×512 array, the same optical system design was employed for both detectors. The optical aperture of the system is F/4, and the optical field of view is 14.59°×11.69°. As depicted in




(a)

(b)
Fig. 10 Target Picture with: (a) 640×512 15 μm MWIR detector,(b) 1 280×1 024 10 μm MWIR detector
图10 中波红外探测器成像图: (a)640×512/15 μm, (b) 1 280×1 024/10 μm
The 10 μm pitch 1280×1024 HgCdTe MWIR FPAs were successfully fabricated by Zhejiang Juexin Microelectronics Co., Ltd.. The height difference of the HgCdTe surface less than 0.5 μm by the optimization of substrate CMP and CP processing. And successfully developed the processing technique of 10 μm pixels based on
Acknowledgements
The author would like to thank Researcher Yang Jianrong of Shanghai Institute of Technical Physics, Chinese Academy of Sciences for his theoretical support for process research and development.
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