A novel self-alignment method for high precision silicon diffraction microlens arrays preparation and its integration with infrared focal plane arrays
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1.State Key Laboratory of Photovoltaic Science and Technology,Shanghai Frontiers Science Research Base of Intelligent Optoelectronics and Perception,Institute of Optoelectronics,Fudan University;2.State Key Laboratory of Infrared Physics,Shanghai Institute of Technical Physics,Chinese Academy of Sciences, Yu Tian Road

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TN215

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    Abstract:

    Silicon (Si) diffraction microlens arrays are usually used to integrating with infrared focal plane arrays (IRFPAs) to improve their performance. The errors of lithography are unavoidable in the process of the Si diffraction microlens arrays preparation in the conventional engraving method. It has a serious impact on its performance and subsequent applications. In response to the problem of errors of Si diffraction microlens arrays in the conventional method, a novel self-alignment method for high precision Si diffraction microlens arrays preparation is proposed. The accuracy of the Si diffractive microlens arrays preparation is determined by the accuracy of the first lithography mask in the novel self-alignment method. In the subsequent etching, the etched area will be protected by the mask layer and the sacrifice layer or the protective layer. The unprotection area is carved to effectively block the non-etching areas, accurately etch the etching area required, and solve the problem of errors. The high precision Si diffraction microlens arrays is obtained by the novel self-alignment method and the diffraction efficiency could reach 92.6 %. After integrating with IRFPAs, the average blackbody responsity increased by 8.3 %, and the average blackbody detectivity increased by 10.3 %. It indicates that the Si diffraction microlens arrays can improve the filling factor and reduce crosstalk of IRFPAs through convergence, thereby improving the performance of the IRFPAs. The results are of great reference significance for improving their performance through optimizing the preparation level of micro nano devices.

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History
  • Received:October 12,2023
  • Revised:December 20,2023
  • Adopted:December 28,2023
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