Low noise is a key requirement of readout integrated circuit （ROIC） in hyperspectral applications for its low radiation. Correlated double sampling （CDS） is commonly used to suppress noise. In this paper， CDS is improved by adjusting the time interval between the clamp and sample-and-hold （SH）， which can filter low-frequency noise flexibly. A 640×512， 15 μm pixel pitch ROIC is designed and fabricated in 180 nm CMOS process. The input stage consists of low-noise capacitive trans-impedance amplifier （CTIA） and CDS with adjustable intervals （AICDS）. A timing generator is proposed to extend the CDS reset time from 0 to 270 clock cycles. By extending the reset time to decrease the time interval， the noise electrons are significantly decreased from 39 e^- to 18.3 e^-. The SPECTRE simulation and the experimental results corroborate that the proposed structure AICDS can optimize noise performance of hyperspectral ROIC， thus can be widely used.