According to the level of domestic processing technology at present, the circuit structure of anti-parallel diodes with self-bias was proposed. With this structure, not only the difficult problem of processing bias circuit can be solved, but also the odd-order frequency multiplication can be realized efficiently. At the meantime, co-simulation approach was used to simulate the electrical characteristic of the tripler by software HFSS and ADS, including the impact of the parastics. After designing, both the machining and electrical installation are accomplished. The highest measured output power is 3.1mW at 221GHz and the output power is more than 2mW at frequencies of the range 219～227GHz. These results can provide important reference for future design of high efficiency submillimeter frequency multiplier.