Infrared large-area array (2560×2048) digital readout circuits require high-speed, low-power consumption, and strong driving capabilities for chip data interfaces. Using 0.18 μm complementary metal oxide semiconductor (CMOS) process, a 4:1 parallel-to-serial conversion circuit, a level translation circuit, and a low voltage differential signal (LVDS) driver circuit using pre-emphasis technology were designed. The parallel-to-serial conversion circuit adopts a double-edge sampling tree structure to reduce clock frequency, the level translation circuit adopts a positive feedback structure to improve the speed, and the LVDS driving circuit uses a pre-emphasis secondary path with programmable current to compensate for high-frequency components in the main path, ensuring driving capability and improving the integrity of high-speed signals. The data transmission rate of the interface can reach 1 Gbit/s, and when the load capacitance is 2 pF, the power consumption of one channel is 15.8 mW@1 Gbit/s; When the load capacitance is 8 pF, with pre-emphasis turned on, the power consumption of one channel is 19 mW@1 Gbit/s, the output voltage swing is 350 mV, and the output common-mode level is 1.21 V. All parameters of the LVDS drive circuit meet the standard protocol.