With the development of signal processing algorithms, the algorithm updatable requirement is put forward for the Field Programmable Gate Array (FPGA) used in the field of space. Since traditional fixed algorithm models could not meet this requirement, the inorbit reconfigurable design of FPGAs onboard satellites becomes the key to solve the problem. A FPGA reconfigurable design scheme based on the satellite-to-ground link is proposed. In the scheme, the configuration data are uploaded through the satellite-to-ground link and are stored in the Electrically Erasable Programmable read only memory (EEPROM). Then, an antifuse device is used to implement large scale algorithm reconfiguration on the FPGA. This design scheme is verified and the flexibility of the spaceborne FPGAs is improved.