Infrared focal plane digital readout circuit is one of the important development directions of infrared focal plane detection technology. Aiming at the requirements of high-speed， high-precision and multi-application scenarios of infrared focal plane， a new architecture of multi-mode incremental Sigma-Delta analog-to-digital converter （ADC） with 3-bit quantizer is designed. By integrating the data weighted average algorithm into the 3-bit quantizer， the influence of capacitor mismatch in the feedback loop is reduced， and the conversion speed and accuracy of ADC are improved； the multiplexer was embedded in the CIC digital extraction filter to realize ADC supporting different conversion speeds and output bits. Based on 180 nm CMOS process design， the design of multi-mode incremental Sigma-Delta ADC is completed. The simulation results show that the conversion between conversion speed and output bits can be realized under multi-mode operation， and the ADC conversion speed increases from 12.5 ksps to 100 ksps， and the output bits increase from 15 bits to 24 bits； at a conversion speed of 50 ksps， the effective number of bits of the post-simulation ADC reaches 13.1 bits， and the current consumption of each column of ADC is only 90 μA.