基于CSMRC的WR-3全频段三倍频器设计
投稿时间:2017-09-28  修订日期:2017-10-31  点此下载全文
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作者单位E-mail
郭健 东南大学毫米波国家重点实验室 jguo@seu.edu.cn 
沈玮 上海航天电子技术研究所  
孟洪福 东南大学毫米波国家重点实验室  
基金项目:国家自然科学基金青年基金(61401091),上海航天科技创新基金(SAST2016098).
中文摘要:本文给出了覆盖WR-3波导全频段的基于石英基片的高效率全频段平衡式三次倍频器的设计方法。本文采用紧凑悬置微带谐振器(Compact Suspended Microstrip Resonator Cell (CSMRC))作为倍频器的输入端滤波及匹配电路,不但提高了带外抑制,还有效的降低了电路尺寸和所需的腔体宽度。倍频器电路包括两个波导/悬置微带转换电路,一个反向并联二极管对、一个SCMRC和两段匹配传输线构成。通过仿真和测试结果的比对可以看出,设计及仿真方法是准确有效的。在225~330GHz范围内,两套样品的测试输出功率为45~95uW,平均功率约为60uW。倍频器的最佳倍频效率对应的输入功率约为+5dBm,全频段范围内倍频效率为1.5%~3%。
中文关键词:太赫兹  紧凑悬置微带谐振器  肖特基二极管  三次倍频器
 
Design of a Frequency Tripler Based on CSMRC Covering Full WR-3 Band
Abstract:An accurate design approach of full WR-3 waveguide band balanced frequency tripler is proposed in this paper. Compact Suspended Microstrip Resonator Cell (CSMRC) is adopted for input filtering and circuit matching. CSMRC brings relatively higher out-of-band rejection and reduce the size and the channel width of the tripler. The entire tripler is composed of two waveguide-to-suspended stripline transitions, a pair of two anti-parallel diodes, a CSMRC and two matching lines. The design approach is verified by comparing the measured results with the simulated ones. The measured output power of two samples is between 45 to 95 uW at frequencies from 225 to 330 GHz, and the average output power is 60 uW. The conversion efficiency is from 1.5% to 3%, and the optimum efficiency is 3% with +5 dBm drive power.
keywords:THz, CSMRC, Schottky Diode, Frequency Tripler
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